Memristor

An array of 17 purpose-built oxygen-depleted titanium dioxide memristors built at HP Labs, imaged by an atomic force microscope. The wires are about 50 nm, or 150 atoms, wide.[1] Electric current through the memristors shifts the oxygen vacancies, causing a gradual and persistent change in electrical resistance.[2]

A memristor /ˈmɛmrɨstər/ (a portmanteau of "memory resistor") is a passive two-terminal circuit element in which the resistance is a function of the time history of the current and voltage through the device. Memristor theory was formulated and named by Leon Chua in a 1971 paper.[3]

On April 30, 2008 a team at HP Labs announced the development of a switching memristor. Based on a thin film of titanium dioxide, it has a regime of operation with an approximately linear charge-resistance relationship.[4][5][6] These devices are being developed for application in nanoelectronic memories, computer logic, and neuromorphic computer architectures.[7]

Contents

Background

Memristor symbol.

A memristor is a passive two-terminal electronic component for which the resistance (dV/dI) is proportional to the amount of charge that has flowed through the circuit. When current flows in one direction through the device, the resistance increases; and when current flows in the opposite direction, the resistance decreases. When the current is stopped, the component retains the last resistance that it had, and when the flow of charge starts again, the resistance of the circuit will be what it was when it was last active.[8].

More generally, a memristor is a two-terminal component in which the resistance depends on the integral of the input applied to the terminals, rather than on instantaneous value of the input at the terminals. Since the element "remembers" the amount of current that has passed through it in the past, it was tagged by Chua with the name "memristor." A general memristor is any of various kinds of passive two-terminal circuit elements that maintain a functional relationship between the time integrals of current and voltage. This function, called memristance, is similar to variable resistance. Specifically engineered memristors provide controllable resistance, but such devices are not commercially available. Other devices such as batteries and varistors have memristance, but it does not normally dominate their behavior. The definition of the memristor is based solely on fundamental circuit variables, similarly to the resistor, capacitor, and inductor. Unlike those three elements, which are allowed in linear time-invariant or LTI system theory, memristors are nonlinear and may be described by any of a variety of time-varying functions of net charge. There is no such thing as a generic memristor. Instead, each device implements a particular function, wherein either the integral of voltage determines the integral of current, or vice versa. A linear time-invariant memristor is simply a conventional resistor.[9]

In his 1971 paper, memristor theory was formulated and named by Leon Chua,[3] extrapolating the conceptual symmetry between the resistor, inductor, and capacitor, and inferring that the memristor is a similarly fundamental device. Other scientists had already proposed fixed nonlinear flux-charge relationships, but Chua's theory introduced generality.

Like other two-terminal components (e.g., resistor, capacitor, inductor), real-world devices are never purely memristors ("ideal memristor"), but will also exhibit some amount of capacitance, resistance, and inductance.

Theory

The memristor is essentially a two-terminal variable resistor, with resistance dependent upon the amount of charge q that has passed between the terminals.

V = I \cdot M(q)

To relate the memristor to the resistor, capacitor, and inductor, it is helpful to isolate the term M(q), which characterizes the device, and write it as a differential equation.

Device Characteristic property (units) Differential equation
Resistor Resistance (A / V = Ω) R = dI / dV
Capacitor Capacitor (C / V = F) C = dQ / dV
Inductor Inductance (Wb / A = H) L = dΦm / dI
Memristor Memristance (Wb / C = Ω) M = dΦm / dQ

where Q is defined by Q = dI/dt, and Φm is defined by V = dΦm/dt. Note that the above table covers all meaningful ratios of I, Q, Φm, and V. No device can relate I to Q, or Φm to V, because I is the integral of Q and Φm is the integral of V.

The variable Φm ("magnetic flux linkage") is a generalized from the circuit characteristic of an inductor. It does not represent a magnetic field here, and its physical meaning is discussed below. The symbol Φm may simply be regarded as the integral of voltage over time.[10]

Thus, the memristor is formally defined[3] as a two-terminal element in which the flux linkage (or integral of voltage) Φm between the terminals is a function of the amount of electric charge Q that has passed through the device. Each memristor is characterized by its memristance function describing the charge-dependent rate of change of flux with charge.

M(q)=\frac{\mathrm d\Phi_m}{\mathrm dq}

Substituting that magnetic flux is simply the time integral of voltage, and charge is the time integral of current, we may write the more convenient form

M(q(t))=\cfrac{\mathrm d\Phi_m/\mathrm dt}{\mathrm dq/\mathrm dt}=\frac{V(t)}{I(t)}

It can be inferred from this that memristance is simply charge-dependent resistance. If M(q(t)) is a constant, then we obtain Ohm's Law R(t) = V(t)/ I(t). If M(q(t)) is nontrivial, however, the equation is not equivalent because q(t) and M(q(t)) will vary with time. Solving for voltage as a function of time we obtain

V(t) =\ M(q(t)) I(t)

This equation reveals that memristance defines a linear relationship between current and voltage, as long as M does not vary with charge. Of course, nonzero current implies time varying charge. Alternating current, however, may reveal the linear dependence in circuit operation by inducing a measurable voltage without net charge movement—as long as the maximum change in q does not cause much change in M.

Furthermore, the memristor is static if no current is applied. If I(t) = 0, we find V(t) = 0 and M(t) is constant. This is the essence of the memory effect.

The power consumption characteristic recalls that of a resistor, I2R.

P(t) =\ I(t)V(t) =\ I^2(t) M(q(t))

As long as M(q(t)) varies little, such as under alternating current, the memristor will appear as a resistor. If M(q(t)) increases rapidly, however, current and power consumption will quickly stop.

Flux linkage in a passive device

In an inductor, magnetic flux Φm typically relates to Faraday's law of induction, which states that the energy to push charges around a loop (electromotive force, in units of volts) equals the negative derivative of the flux through the loop:

\mathcal E = \frac{-\mathrm d\Phi_\mathrm m}{\mathrm dt}

This notion may be extended by analogy to a single device. Working against an accelerating force (which may be EMF, or any applied voltage), a resistor produces a decelerating force, and an associated "flux linkage" varying with opposite sign. For example, a high-valued resistor will quickly produce flux linkage. The term "flux linkage" is more commonly used with inductors, where it makes more sense: If an average of 1 volt is applied across an inductor over 1 second, then there is 1 V·s of flux linkage in the inductor, which represents energy that may later be obtained from it. The same bias over the same time across a resistor results in the same flux linkage, but the energy is dissipated — there is no physical magnetic field involved as a link to anything. Voltage for passive devices is evaluated in terms of energy lost by a unit of charge, so generalizing the above equation simply requires reversing the sense of EMF.

V = \frac{\mathrm d\Phi_\mathrm m}{\mathrm dt\,}
\Phi_\mathrm m = \int V\mathrm dt

Observing that Φm is simply equal to the integral over time of the potential drop between two points, we find that it may readily be calculated, for example by an operational amplifier configured as an integrator.

Two unintuitive concepts are at play:

The upshot is that a passive element may relate some variable to flux without storing a magnetic field. Indeed, a memristor always appears instantaneously as a resistor. As shown above, assuming non-negative resistance, at any instant it is dissipating power from an applied EMF and thus has no outlet to dissipate a stored field into the circuit. This contrasts with an inductor, for which a magnetic field stores all energy originating in the potential across its terminals, later releasing it as an electromotive force within the circuit.

Physical restrictions on M(q)

An applied constant voltage potential results in uniformly increasing Φm. Numerically, infinite memory resources, or an infinitely strong field, would be required to store a number which grows arbitrarily large. Three alternatives avoid this physical impossibility:

Memristive systems

The memristor was generalized to memristive systems in a 1976 paper by Leon Chua.[11] Whereas a memristor has mathematically scalar state, a system has vector state. The number of state variables is independent of, and usually greater than, the number of terminals.

In this paper, Chua applied this model to empirically observed phenomena, including the Hodgkin-Huxley model of the axon and a thermistor at constant ambient temperature. He also described memristive systems in terms of energy storage and easily observed electrical characteristics. These characteristics match resistive random-access memory and phase-change memory, relating the theory to active areas of research.

In the more general concept of an n-th order memristive system the defining equations are

V(t)=M(\textbf{w},I,t)I(t),
\dot{\textbf{w}}=f(\textbf{w},I,t)

where the vector w represents a set of n state variables describing the device.[12] The pure memristor is a particular case of these equations, namely when M depends only on charge (w=q) and since the charge is related to the current via the time derivative dq/dt=I. For pure memristors f is not an explicit function of I.[12]

Operation as a switch

For some memristors, applied current or voltage will cause a great change in resistance. Such devices may be characterized as switches by investigating the time and energy that must be spent in order to achieve a desired change in resistance. Here we will assume that the applied voltage remains constant and solve for the energy dissipation during a single switching event. For a memristor to switch from Ron to Roff in time Ton to Toff, the charge must change by ΔQ = Qon−Qoff.

E_{\mathrm{switch}} =\ V^2\int_{T_\mathrm{off}}^{T_\mathrm{on}} \frac{\mathrm dt}{M(q(t))} =\ V^2\int_{Q_\mathrm{off}}^{Q_\mathrm{on}}\frac{\mathrm dq}{I(q)M(q)} =\ V^2\int_{Q_\mathrm{off}}^{Q_\mathrm{on}}\frac{\mathrm dq}{V(q)} =\ V\Delta Q

To arrive at the final expression, substitute V=I(q)M(q), and then ∫dq/V = ∆Q/V for constant V. This power characteristic differs fundamentally from that of a metal oxide semiconductor transistor, which is a capacitor-based device. Unlike the transistor, the final state of the memristor in terms of charge does not depend on bias voltage.

The type of memristor described by Williams ceases to be ideal after switching over its entire resistance range and enters hysteresis, also called the "hard-switching regime."[13] Another kind of switch would have a cyclic M(q) so that each off-on event would be followed by an on-off event under constant bias. Such a device would act as a memristor under all conditions, but would be less practical.

Implementations

Titanium dioxide memristor

Interest in the memristor revived in 2008 when an experimental solid state version was reported by R. Stanley Williams of Hewlett Packard.[14][15][16] The article was the first to demonstrate that a solid-state device could have the characteristics of a memristor based on the behavior of nanoscale thin films. The device neither uses magnetic flux as the theoretical memristor suggested, nor stores charge as a capacitor does, but instead achieves a resistance dependent on the history of current.

Although not cited in HP's initial reports on their TiO2 memristor, the resistance switching characteristics of titanium dioxide was originally described in the 1960s.[17]

The HP device is composed of a thin (50 nm) titanium dioxide film between two 5 nm thick electrodes, one Ti, the other Pt. Initially, there are two layers to the titanium dioxide film, one of which has a slight depletion of oxygen atoms. The oxygen vacancies act as charge carriers, meaning that the depleted layer has a much lower resistance than the non-depleted layer. When an electric field is applied, the oxygen vacancies drift (see Fast ion conductor), changing the boundary between the high-resistance and low-resistance layers. Thus the resistance of the film as a whole is dependent on how much charge has been passed through it in a particular direction, which is reversible by changing the direction of current.[5] Since the HP device displays fast ion conduction at nanoscale, it is considered a nanoionic device.[18]

Memristance is displayed only when both the doped layer and depleted layer contribute to resistance. When enough charge has passed through the memristor that the ions can no longer move, the device enters hysteresis. It ceases to integrate q=∫Idt but rather keeps q at an upper bound and M fixed, thus acting as a resistor until current is reversed.

Memory applications of thin-film oxides had been an area of active investigation for some time. IBM published an article in 2000 regarding structures similar to that described by Williams.[19] Samsung has a U.S. patent for oxide-vacancy based switches similar to that described by Williams.[20] Williams also has a pending U.S. patent application related to the memristor construction.[21]

Although the HP memristor is a major discovery for electrical engineering theory, it has yet to be demonstrated in operation at practical speeds and densities. Graphs in Williams' original report show switching operation at only ~1 Hz. Although the small dimensions of the device seem to imply fast operation, the charge carriers move very slowly, with an ion mobility of 10−10 cm2/(V*s). In comparison, the highest known drift ionic mobilities occur in advanced superionic conductors, such as rubidium silver iodide with about 2×10−4 cm2/(V*s) conducting silver ions at room temperature. Electrons and holes in silicon have a mobility ~1000 cm2/(V*s), a figure which is essential to the performance of transistors. However, a relatively low bias of 1 volt was used, and the plots appear to be generated by a mathematical model rather than a laboratory experiment.[5]

In April 2010, HP labs announced that they had practical memristors working at 1ns switching times and 3 nm by 3 nm sizes, with electron/hole mobility of 1m/s[22] , which bodes well for the future of the technology.[23] At these densities it could easily rival the current sub-25 nm flash memory technology.

Polymeric memristor

In July 2008, Victor Erokhin and Marco P. Fontana, in Electrochemically controlled polymeric device: a memristor (and more) found two years ago,[24] claim to have developed a polymeric memristor before the titanium dioxide memristor more recently announced.

In 2004, Juri H. Krieger and Stuart M. Spitzer published a paper "Non-traditional, Non-volatile Memory Based on Switching and Retention Phenomena in Polymeric Thin Films"[25] at the IEEE Non-Volatile Memory Technology Symposium, describing the process of dynamic doping of polymer and inorganic dielectric-like materials in order to improve the switching characteristics and retention required to create functioning nonvolatile memory cells. Described is the use of a special passive layer between electrode and active thin films, which enhances the extraction of ions from the electrode. It is possible to use fast ion conductor as this passive layer, which allows to significantly decrease the ionic extraction field.

Spin memristive systems

Spintronic Memristor

Yiran Chen and Xiaobin Wang, researchers at disk-drive manufacturer Seagate Technology, in Bloomington, Minnesota, described three examples of possible magnetic memristors in March, 2009 in IEEE Electron Device Letters.[26] In one of the three, resistance is caused by the spin of electrons in one section of the device pointing in a different direction than those in another section, creating a "domain wall," a boundary between the two states. Electrons flowing into the device have a certain spin, which alters the magnetization state of the device. Changing the magnetization, in turn, moves the domain wall and changes the device's resistance.

This work attracted significant attention from the electronics press, including an interview by IEEE Spectrum.[27]

Spin Torque Transfer Magnetoresistance

Spin Torque Transfer MRAM is a well-known device that exhibits memristive behavior. The resistance is dependent on the relative spin orientation between two sides of a magnetic tunnel junction. This in turn can be controlled by the spin torque induced by the current flowing through the junction. However, the length of time the current flows through the junction determines the amount of current needed, i.e., the charge flowing through is the key variable.[28]
Additionally, as reported by Krzysteczko et al.,[29] MgO based magnetic tunnel junctions show memristive behavior based on the drift of oxygen vacancies within the insulating MgO layer (resistive switching). Therefore, the combination of spin transfer torque and resistive switching leads naturally to a second-order memristive system with w=(w1,w2) where w1 describes the magnetic state of the magnetic tunnel junction and w2 denotes the resistive state of the MgO barrier. Note that in this case the change of w1 is current-controlled (spin torque is due to a high current density) whereas the change of w2 is voltage-controlled (the drift of oxygen vacancies is due to high electric fields).

Spin Memrisitive System

A fundamentally different mechanism for memristive behavior has been proposed by Yuriy V. Pershin and Massimiliano Di Ventra in their paper "Spin memristive systems".[30] The authors show that certain types of semiconductor spintronic structures belong to a broad class of memristive systems as defined by Chua and Kang.[11] The mechanism of memristive behavior in such structures is based entirely on the electron spin degree of freedom which allows for a more convenient control than the ionic transport in nanostructures. When an external control parameter (such as voltage) is changed, the adjustment of electron spin polarization is delayed because of the diffusion and relaxation processes causing a hysteresis-type behavior. This result was anticipated in the study of spin extraction at semiconductor/ferromagnet interfaces,[31] but was not described in terms of memristive behavior. On a short time scale, these structures behave almost as an ideal memristor.[3] This result broadens the possible range of applications of semiconductor spintronics and makes a step forward in future practical applications of the concept of memristive systems.

Manganite memristive systems

Although not described using the word "memristor", a study was done of bilayer oxide films based on manganite for non-volatile memory by researchers at the University of Houston in 2001.[32] Some of the graphs indicate a tunable resistance based on the number of applied voltage pulses similar to the effects found in the titanium dioxide memristor materials described in the Nature paper "The missing memristor found".

Resonant tunneling diode memristor

In 1994, F. A. Buot and A. K. Rajagopal of the U.S. Naval Research Laboratory demonstrated[33] that a 'bow-tie' current-voltage (I-V) characteristics occurs in AlAs/GaAs/AlAs quantum-well diodes containing special doping design of the spacer layers in the source and drain regions, in agreement with the published experimental results.[34] This 'bow-tie' current-voltage (I-V) characteristic is characteristic of a memristor although the term memristor was not explicitly used in their papers. No magnetic interaction is involved in the analysis of the 'bow-tie' I-V characteristics.

3-terminal Memristor (Memistor)

Although the memristor is defined in terms of a 2-terminal circuit element, there was an implementation of a 3-terminal device called a memistor developed by Bernard Widrow in 1960. Memistors formed basic components of a neural network architecture called ADALINE developed by Widrow and Ted Hoff (who later invented the microprocessor at Intel). In one of the technical reports[35] the memistor was described as follows:

Like the transistor, the memistor is a 3-terminal element. The conductance between two of the terminals is controlled by the time integral of the current in the third, rather than its instantaneous value as in the transistor. Reproducible elements have been made which are continuously variable (thousands of possible analog storage levels), and which typically vary in resistance from 100 ohms to 1 ohm, and cover this range in about 10 seconds with several milliamperes of plating current. Adaptation is accomplished by direct current while sensing the neuron logical structure is accomplished nondestructively by passing alternating currents through the arrays of memistor cells.

Since the conductance was described as being controlled by the time integral of current as in Chua's theory of the memristor, the memistor of Widrow may be considered as a form of memristor having three instead of two terminals. However, one of the main limitations of Widrow's memistors was that they were made from an electroplating cell rather than as a solid-state circuit element. Solid-state circuit elements were required to achieve the scalability of the integrated circuit which was gaining popularity around the same time as the invention of Widrow's memistor.

A Google Knol article suggests that the Floating Gate MOSFET as well as other 3-terminal "memory transistors" may be modeled using memristive systems equations.[36]

Potential applications

Williams' solid-state memristors can be combined into devices called crossbar latches, which could replace transistors in future computers, taking up a much smaller area.

They can also be fashioned into non-volatile solid-state memory, which would allow greater data density than hard drives with access times potentially similar to DRAM, replacing both components.[37] HP prototyped a crossbar latch memory using the devices that can fit 100 gigabits in a square centimeter, and has designed a highly scalable 3D design (consisting of up to 1000 layers or 1 petabit per cm3).[7] HP has reported that its version of the memristor is currently about one-tenth the speed of DRAM.[38] The devices' resistance would be read with alternating current so that the stored value would not be affected.[39]

Some patents related to memristors appear to include applications in programmable logic,[40] signal processing,[41] neural networks,[42] and control systems.[43]

Recently, a simple electronic circuit[44] consisting of an LC network and a memristor was used to model experiments on adaptive behavior of unicellular organisms.[45] It was shown that the electronic circuit subjected to a train of periodic pulses learns and anticipates the next pulse to come, similarly to the behavior of slime molds Physarum polycephalum subjected to periodic changes of environment.[45] Such a learning circuit may find applications, e.g., in pattern recognition.

Memcapacitors and Meminductors

In 2009, Massimiliano Di Ventra, Yuriy Pershin and Leon Chua co-wrote an article[46] extending the notion of memristive systems to capacitive and inductive elements in the form of memcapacitors and meminductors whose properties depend on the state and history of the system.

Timeline of memristor and memristive systems developments

1960
1967
1968
1969
1971
1976
1986
1990
1992
1993
1994
1998
2000
2001
2004
2005
2006
2007
2008
2009
2010
2013

See also

References

  1. ↑ Bush S, "HP nano device implements memristor", Electronics Weekly 2008-05-02
  2. ↑ Michael Kanellos "HP makes memory from a once-theoretical circuit" 2008-04-30 (Blog entry-not a reliable source)
  3. ↑ 3.0 3.1 3.2 3.3 Chua, Leon O (September 1971), "Memristor—The Missing Circuit Element", IEEE Transactions on Circuit Theory CT-18 (5): 507–519, doi:10.1109/TCT.1971.1083337, http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1083337 
  4. ↑ Tour, James M; He, Tao (2008), "Electronics: The fourth element", Nature 453 (7191): 42–43, doi:10.1038/453042a, PMID 18451847, http://www.nature.com/nature/journal/v453/n7191/full/453042a.html 
  5. ↑ 5.0 5.1 5.2 Strukov, Dmitri B; Snider, Gregory S; Stewart, Duncan R; Williams, Stanley R (2008), "The missing memristor found", Nature 453 (7191): 80–83, doi:10.1038/nature06932, PMID 18451858, http://www.nature.com/nature/journal/v453/n7191/full/nature06932.html 
  6. ↑ Marks, Paul (2008-04-30), Engineers find 'missing link' of electronics, New Scientist, http://technology.newscientist.com/article/dn13812-engineers-find-missing-link-of-electronics.html, retrieved 2008-04-30  See also: Researchers Prove Existence of New Basic Element for Electronic Circuits -- Memristor', Physorg.com, 2008-04-30, http://www.physorg.com/news128786808.html, retrieved 2008-04-30 
  7. ↑ 7.0 7.1 'Missing link' memristor created, EETimes, 2008-04-30, http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=207403521, retrieved 2008-04-30 
  8. ↑ HP, Memristor FAQ (accessed Sept 3, 2010)
  9. ↑ Chua 1971, p. 511: ... In the very special case where the memristor Φ-q curve is a straight line, ... the memristor reduces to a linear time-invariant resistor.
  10. ↑ Knoepfel, Heinz (1970), Pulsed high magnetic fields, New York: North-Holland, pp. 37, Eq. (2.80) .
  11. ↑ 11.0 11.1 Chua, L.O., and Kang, S.M., Memristive Devices and Systems, Proceedings of the IEEE 64, 209, 1976
  12. ↑ 12.0 12.1 Strukov, Dimitri B; Borghetti, Julien L.; Williams, R. Stanley (2009), "Coupled ionic and electronic transport model of thin-film semiconductor memristive behavior.", Small 5 (9): 1058–1063, doi:10.1002/smll.200801323, PMID 19226597 
  13. ↑ Williams pp 81-82.
  14. ↑ Fildes, Jonathan (2007-11-13), Getting More from Moore's Law, BBC, http://news.bbc.co.uk/2/hi/technology/7080772.stm, retrieved 2008-04-30  See also: (PDF) Bulletin for Electrical and Electronic Engineers of Oregon, Institute of Electrical and Electronics Engineers, September 2007, http://www.ieee-or.org/beeep/2007/sep/beeep_sep07.pdf, retrieved 2008-04-30 
  15. ↑ R. Stanley Williams (HP biography), http://www.hpl.hp.com/about/bios/stanwilliams.html 
  16. ↑ Stan Williams, (HP biography), http://www.hpl.hp.com/research/qsr/people/Stan_Williams/ 
  17. ↑ Argall, F. (1968), "Switching Phenomena in Titanium Oxide Thin Films", Solid-State Electronics Vol. 11: 535–541, doi:10.1016/0038-1101(68)90092-0, http://pdf.com.ru/a/ky1300.pdf 
  18. ↑ Terabe, Kazuya; Hasegawa, Tsuyoshi; Liang, Changhao; Aono, Masakazu (2007), "Control of local ion transport to create unique functional nanodevices based on ionic conductors", Science and Technology of Advanced Materials 8 (6): 536–542 (free download), doi:10.1016/j.stam.2007.08.002, http://linkinghub.elsevier.com/retrieve/pii/S146869960700126X 
  19. ↑ Beck, A.; Bednorz, J.G.; Gerber, C.; Rossel, C.; Widmer, D. (2000), "Reproducible switching effect in thin oxide films for memory applications", Applied Physics Letters 77: 139, doi:10.1063/1.126902, http://link.aip.org/link/?APPLAB/77/139/1 
  20. ↑ US Patent 7,417,271, http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7417271.PN.&OS=PN/7417271&RS=PN/7417271, 
  21. ↑ US Patent Application 11/542,986, http://appft1.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=1&p=1&f=G&l=50&d=PG01&S1=20080090337.PGNR.&OS=dn/20080090337&RS=DN/20080090337, 
  22. ↑ , http://www.youtube.com/watch?v=bKGhvKyjgLY 
  23. ↑ , http://www.nytimes.com/2010/04/08/science/08chips.html?hpw 
  24. ↑ Erokhin, V.; Fontana, M.P. (2008), "Electrochemically controlled polymeric device: a memristor (and more) found two years ago", Arxiv preprint, http://arxiv.org/pdf/0807.0333 
  25. ↑ Juri H. Krieger and Stuart M. Spitzer, "Non-traditional, Non-volatile Memory Based on Switching and Retention Phenomena in Polymeric Thin Films", IEEE Proceeding 2004 Non-Volatile Memory Technology Symposium
  26. ↑ Wang, Xiaobin; Chen, Yiran; Xi, Haiwen; Dimitrov, Dimitor; Dimitrov, Dimitar (2009), "Spintronic Memristor through Spin Torque Induced Magnetization Motion", IEEE Electron Device Letters 30 (3): 294–297, doi:10.1109/LED.2008.2012270, http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?isnumber=4787231&arnumber=4781542&count=31&index=28 
  27. ↑ Savage, Neil (2009), "Spintronic Memristor through Spin Torque Induced Magnetization Motion", IEEE Spectrum (3), http://www.spectrum.ieee.org/semiconductors/devices/spintronic-memristors 
  28. ↑ Y. Huai, AAPPS Bulletin, December 2008, vol. 18, No. 6, p. 33, "Spin-Transfer Torque MRAM (STT-MRAM): Challenges and Prospects."
  29. ↑ 29.0 29.1 Krzysteczko, Patryk; Günter, Reiss; Thomas, Andy (2009), "Memristive switching of MgO based magnetic tunnel junctions", Applied Physics Letters 95: 112508, doi:10.1063/1.3224193 
  30. ↑ Pershin, Yuriy V; Di Ventra, Massimiliano (2008), "Spin memristive systems: Spin memory effects in semiconductor spintronics", Physical Review B 78: 113309, doi:10.1103/PhysRevB.78.113309, http://link.aps.org/abstract/PRB/v78/e113309 
  31. ↑ Pershin, Yuriy V; Di Ventra, Massimiliano (2008), "Current-voltage characteristics of semiconductor/ferromagnet junctions in the spin-blockade regime", Physical Review B 77: 073301, doi:10.1103/PhysRevB.77.073301, http://link.aps.org/abstract/PRB/v77/e073301 
  32. ↑ Liu, Shangqing; Wu, NaiJuan; Chen, Xin; Ignatiev, Alex (2001-11-06) (PDF), A New Concept for Non-Volatile Memory: The Electric Pulse Induced Resistive Change Effect in Colossal Magnetoresistive thin Films, http://klabs.org/richcontent/MemoryContent/nvmt_symp/nvmts_2001/papers_presentations/05_electric_pulse/05_Ignatiev-foils.pdf, retrieved 2008-10-05 
  33. ↑ Buot, F. A.; Rajagopal, A. K. (1994), "Binary information storage at zero bias in quantum-well diodes", Journal of Applied Physics 76: 5552, doi:10.1063/1.357158 
  34. ↑ Gullapalli,, K. K.; Tsao, D. P.; Neikirk,, D. P. (1993.), "Experimental observation of multiple current-voltage curves and zero-bias memory phenomena in quantum well diodes with n--n++- spacer layers", Applied Physics Letters 62: 2971, doi:10.1063/1.109160 
  35. ↑ Widrow, B.; Pierce, W. H.; Angell, J.B. (1961), "Birth, Life, and Death in Microelectronic Systems", Technical Report No. 1552-2/1851-1, http://www-isl.stanford.edu/~widrow/papers/j1961birthlife.pdf 
  36. ↑ Mouttet, Blaise. "An Extended Memristive System Model Applied to Floating Gate MOSFETs". http://knol.google.com/k/anonymous/an-extended-memristive-system-model/23zgknsxnlchu/8#. Retrieved 6 June 2010. 
  37. ↑ Kanellos, Michael (2008-04-30), HP makes memory from a once theoretical circuit, CNET News.com, http://www.news.com/8301-10784_3-9932054-7.html, retrieved 2008-04-30 
  38. ↑ Markoff, John (2008-05-01), H.P. Reports Big Advance in Memory Chip Design, NY Times, http://www.nytimes.com/2008/05/01/technology/01chip.html, retrieved 2008-05-01 
  39. ↑ Gutmann, Ethan (2008-05-01), Maintaining Moore's law with new memristor circuits, Ars Technica, http://arstechnica.com/news.ars/post/20080501-maintaining-moores-law-with-new-memristor-circuits.html, retrieved 2008-05-01 
  40. ↑ U.S. Patent 7,203,789
  41. ↑ U.S. Patent 7,302,513
  42. ↑ U.S. Patent 7,359,888
  43. ↑ US application 11/976,927 
  44. ↑ Pershin, Yuriy V; La Fontaine, Steven; Di Ventra, Massimiliano (2009), "Memristive model of amoeba learning", Physical Review E 80: 021926, doi:10.1103/PhysRevE.80.021926, http://link.aps.org/doi/10.1103/PhysRevE.80.021926 
  45. ↑ 45.0 45.1 Saigusa, Tetsu; Tero, Atsushi; Nakagaki, Toshiyuki; Kuramoto, Yoshiki (2008), "Amoebae Anticipate Periodic Events", Phys. Rev. Lett. 100 (1): 018101, doi:10.1103/PhysRevLett.100.018101, PMID 18232821, http://link.aps.org/abstract/PRL/v100/e018101 
  46. ↑ Di Ventra, Massimiliano; Pershin, Yuriy V; Chua, Leon (2009), "Circuit elements with memory: memristors, memcapacitors and meminductors", Proceedings of the IEEE 97: 1717, doi:10.1109/JPROC.2009.2021077, http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=5247123&arnumber=5247127&count=13&index=7&tag=1 
  47. ↑ Krieger, Ju. H.; Yudanov, N.F.; Igumenov, I.K.; Vaschenko, S.B. (1993), "Study of Test Structures of a Molecular Memory Element", Journal of Structural Chemistry 34 (6): 966–970, doi:10.1007/BF00752875 
  48. ↑ Krieger, Ju. H.; Trubin, S.V.; Vaschenko, S.B.; Yudanov, N.F. (2001), "Molecular analogue memory cell based on electrical switching and memory in molecular thin films", Synthetic Metals 122: 199–202, doi:10.1016/S0379-6779(00)01354-0 
  49. ↑ , http://www.nature.com/nature/journal/v453/n7191/full/nature06932.html 
  50. ↑ http://knol.google.com/k/anonyme/an-introduction-to-memimpedance-and/23zgknsxnlchu/5
  51. ↑ Mouttet, Blaise L (2009), "Memristor Pattern Recognition Circuit Architecture for Robotics", Proceedings of the 2nd International Multi-Conference on Engineering and Technological Innovation II: 65–70, http://www.iiis2009.org/imeti/program/HTML/program-20.htm 
  52. ↑ Choi, H; Jung, H; Lee, J; Yoon, J; Park, J; Seong, DJ; Lee, W; Hasan, M et al. (2009), "An electrically modifiable synapse array of resistive switching memory.", Nanotechnology 20 (34): 345201, doi:10.1088/0957-4484/20/34/345201, PMID 19652272, http://www.iop.org/EJ/abstract/0957-4484/20/34/345201 
  53. ↑ . Kavehei, O.; Iqbal, A.; Kim, Y.S.; Eshraghian, K.; Al-Sarawi, S.F.; Derek, D. (2010), "The Fourth Element: Characteristics, Modelling, and Electromagnetic Theory of the Memristor", Proceedings of the Royal Society A: Mathematical, Physical and Engineering Sciences, http://arxiv.org/abs/1002.3210 
  54. ↑ Borghetti, Julien (2010), "‘Memristive’ switches enable ‘stateful’ logic operations via material implication", Nature, http://www.nature.com/nature/journal/v464/n7290/full/nature08940.html 
  55. ↑ . Eshraghian, K.; Cho, K.R.; Kavehei, O.; Kang, S.K.; Abbott, D.; Kang, S.M. (2010), "Memristor MOS Content Addressable Memory (MCAM): Hybrid Architecture for Future High Performance Search Engines", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, http://arxiv.org/abs/1005.3687 
  56. ↑ Mouttet, Blaise (2010), The mythology of the memristor, ISCAS, Paris, France, http://www.slideshare.net/blaisemouttet/mythical-memristor 
  57. ↑ http://www.reuters.com/article/idUS254583059320100901
  58. ↑ http://www.technologyreview.com/computing/25018/?a=f

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